Flextronics Placement Paper

Q. Checksum in IP packet is
Ans : Sum of the bits and 9's complement of sum

Q. Inselective repeat Max Seq is given find window size
i.e. Ans : (15+1)/2 = 8

Q. Main memory cache direct mapping
Ans : 64

Q. Address lines and data lines for 4K x 16
Ans : Addr 12, Data 16

Q. Infix to postsize commession uses
Ans : operator stack

Q. Printing ofstatic variable
Ans : 11

Q. Ans : 1,2,3,4 ( Program is given
array[0] = 1;
array[1] = 2;
array[2] = 3
array[3] = 4
ptr = array[0]
*(arr+3) = *(++array ) + *(array-1)++)
There may me some mistique in writing
the program. Check it out.
Answer is correct?

Q. What is Scheduling Preemptive

Q. Which of the following is not memory model
(1) buddy system (2) monitor (3) virtual ... etc.

Q. Hight balancing AVC time
Ans : 3

Q. what is Simplification in boolean Algebra

Q. The feature C++ have and c do not have
Ans : Variables can be declared inside also.

Q. Number of nodes with degree two in a binary tree of n leaves
Ans : n-1

Q. Difference between synchronous and asynchronous transmission

Q. Floating point representation
Ans : 2's complement

Q. Using which pin it's possible to address 16 bit addresses even though there
are only 8 address bits in 8085?
Ans: ALE

Q. Voltage gain for an amplifier is 100 while it is operating at 10 volts.
What is the O/P voltage wen i/p is 1 volt

Q. Quality factor indicates
a) Quality of inductor b) quality of capacitor c) both

Q. What is bridges, routers and generators, which OSI layer they correspond to.

Q. OPAmp's I/P current, O/p current and CMRR is given, what is the voltage gain

Q. resistance increases with temperature in a) Metal b) semiconductor

Q. 16 bit mantissa and 8 bit exponent can present what maximum value?

Q. 4 bit window size in sliding window protocol, how many acknowledgements can be held?

Q. Security functionality is provided by which layer of OSI

Q. Among AM and FM which is better and why?

Q. Last stage of TTL NAND gate is called:
Ans: Totem Pole Amplifier

Q. SR to JK flip flop conversion.
Ans: S=JQ', R=KQ

Q. LSB of a shift register is connected to its MSB, what is formed:
Ans: RING Counter

Q. What is Demorgan's laws (identiies: (A+b)' = A'b', etc)

Q. What is Logic gates

Q. Diff in IRET and RET statements of 8086

Q. How many address bytes are required to address an array of memory chips
(4 * 6), each chip having 4 memory bits and 8k registers.

Q. Diff. in memory mapped and I/P O/P mapped Input/Output (Refer a book on Microprocessor)

Q. What is pipeline architecture

Q. What is LAPB protocol